Along with the development of sophisticated information apparatuses including personal computers (PCs), personal digital assistants (PDAs), digital cellular units and car navigation aids in recent years, the need to reduce power consumption of large scale integrated circuits (LSIs) mounted on these apparatuses has tremendously increased. This is due to the requirements to make the batteries of portable information devices to keep their charged state longer and to suppress the costs of chip packages and cooling systems for desktop information devices. On the other hand, there are now increasingly active trends to incorporate high performance multimedia functions for processing video and audio signals and communication into information apparatuses. Thus the calculation capacity required of LSIs to execute such multimedia processing is ever increasing, and this constitutes one of the main causes of increased power consumption by LSIs.
Data processing apparatuses including microprocessors and digital signal processors (DSPs) are extensively used as LSIs for executing multimedia processing such as mentioned above. Incidentally, when these data processing apparatuses are to execute multimedia processing, generally the processing is very often to execute a loop consisting of a relatively small number of instructions, because most instances of multimedia processing are ones of digital signal processing mainly consisting of product sum calculations, which are accomplished by repeating many times (1) multiplication and (2) the addition of the result of multiplication to the cumulative sum.
In a digital signal processor, in many cases, an instruction to generate an internal state for repeated execution of a series of instructions (repeat instruction) is supported. A repeat instruction the number of the serial instructions to be executed reiteratively immediately after that and the number of times they are to be executed reiteratively. As a result, instructions to be executed many times reiteratively are executed without having to read them out of a memory (ROM, RAM or cache memory) many times. Therefore, high speed and reduced power consumption can be achieved. Examples are described in “TMS320C30 Third Generation Digital Signal Processor Users Manual” published by Texas Instruments Japan Ltd. in 1990 (hereinafter referred to as Prior Art 1) and the Gazette of the Japanese Patent Laid-open No. 293124/1992 (hereinafter referred to as Prior Art 2).